Tri-state circuits are widely used as output circuits having large driveability and operable with small power consumption. The tri-state circuit is basically composed of two switching IGFET's connected in series so as to form a push-pull circuit and a control circuit for simultaneously rendering the two IGFET's non-conducting. In the latter state the output terminal is floating and presents a very high impedance looking back into the circuit.
The output terminal of the tri-state circuit is typically connected to an I/O bus line to which other output circuits or input circuits are connected. If an abnormal voltage, (e.g., a negative voltage in the case where N-channel type IGFET's are used) is applied to the bus line when the two switching IGFET's are non-conducting, the effective source-gate voltages of both IGFET's will become forward-biased. Consequently, the two IGFET's will become conducting and will pass an abnormal current therethrough. Furthermore, impact ionization will occur in one of the switching transistors, resulting in an abnormal substrate current. This is a malfunction of the circuit and can cause a breakdown of the transistor.
One solution to the above problem is proposed in U.S. patent application Ser. No. 366,778, assigned to the assignee herein. A protecting IGFET is inserted between a power voltage terminal and one end of the serially connected switching IGFET's. The protecting IFGET is controlled to have a high impedance when both switching transistors are in the non-conducting state. Accordingly, even if an abnormal voltage is applied to the output terminal, no current or only a small current will be produced between the output terminal and the power voltage terminal. Therefore, abnormal operation can be suppressed. In this connection, it is favorable that the above-described protecting IGFET should transmit the potential at the power voltage terminal to the series circuit of transistors without substantially lowering the potential level when it is conducting, and in view of this requirement it is practical to use a depletion type IGFET as the protecting IGFET.
However, the above mentioned technique requires an additional control signal to control the protecting IGFET. This increases the complexity of the control circuitry. Furthermore, since the protecting IGFET and one of the switching IGFET's are connected in series between the output terminal and the power voltage terminal, they should be formed to have large conductances in order to establish a sufficient conducting path between the output terminal and the power voltage terminal. Thus, the protecting IGFET and the mentioned one switching IGFET must have twice the conductance of that required for the switching IGFET's in a conventional tri-state circuit. Therefore, a large chip area is necessary to form the tri-state circuit proposed by the abovementioned patent application.